Site hosted by Angelfire.com: Build your free website today!

Department of Computer Science, UMass Amherst Andrew H. Fagg

Announcements/Reminders

_ HW 6: due Friday. We will cover the material necessary for you to do

question 2 before then.

_ Exam 3: please submit questions.

CMPSCI 377: Operating Systems Lecture 23, Page 1

Department of Computer Science, UMass Amherst Andrew H. Fagg

I/O Systems

_ How does I/O hardware

inuence the OS?

_ What I/O services does the OS

provide?

_ How does the OS implement

those services?

_ How can the OS improve the

performance of I/O?

CPU

System Bus

Disk

Controller

Printer Tape Drive

Controller Controller

Memory Controller

disk disk

printer

tape drive

Memory

CMPSCI 377: Operating Systems Lecture 23, Page 2

Department of Computer Science, UMass Amherst Andrew H. Fagg

Architecture of I/O Systems

_ Key components:

{ System bus: allows the device to communicate with the CPU,

typically shared by multiple devices.

{ A device port (for a single device) typically consisting of 4 registers:

_ Status indicates a device busy, data ready, or error condition

_ Control: command to perform

_ Data-in: data being sent from the device to the CPU

_ Data-out: data being sent from the CPU to the device

{ Controller: receives commands from the system bus, translates them

into device actions, and reads/writes data onto the system bus.

{ The device itself

CMPSCI 377: Operating Systems Lecture 23, Page 3

Department of Computer Science, UMass Amherst Andrew H. Fagg

Architecture of I/O Systems (cont)

_ Traditional devices: disk drive, printer, keyboard, modem, mouse, display

_ Non-traditional devices: joystick, robot actuators, ying surfaces of an

airplane, fuel injection system of a car, ...

CMPSCI 377: Operating Systems Lecture 23, Page 4

Department of Computer Science, UMass Amherst Andrew H. Fagg

I/O Services Provided by OS

_ Naming of _les and devices. (On Unix, devices appear as _les in the /dev

directory)

_ Access control.

_ Operations appropriate to the _les and devices.

_ Device allocation.

_ Bu_ering, caching, and spooling to allow e_cient communication with

devices.

_ I/O scheduling.

CMPSCI 377: Operating Systems Lecture 23, Page 5

Department of Computer Science, UMass Amherst Andrew H. Fagg

I/O Services Provided by OS (cont)

_ Error handling and failure recovery associated with devices (command

retries, for example).

_ Device drivers to implement device-speci_c behaviors.

CMPSCI 377: Operating Systems Lecture 23, Page 6

Department of Computer Science, UMass Amherst Andrew H. Fagg

Communication using Polling

_ CPU busy-waits until the status is idle.

_ CPU sets the command register and data-out if it is an output operation.

_ CPU sets status to command-ready )controller sets status to busy

_ Controller reads the command register and performs the command,

placing a value in data-in if it is an input command.

_ If the operation succeeds, the controller changes the status to idle.

_ CPU observes the change to idle and reads the data if it was an input

operation.

CMPSCI 377: Operating Systems Lecture 23, Page 7

Department of Computer Science, UMass Amherst Andrew H. Fagg

Communication using Polling (cont)

_ Good choice if data must be handled promptly, like for a modem or

keyboard (less true for these speci_c devices today)

_ What happens if the device is slow compared to the CPU?

CMPSCI 377: Operating Systems Lecture 23, Page 8

Department of Computer Science, UMass Amherst Andrew H. Fagg

Communication using Polling (cont)

_ Good choice if data must be handled promptly, like for a modem or

keyboard

_ What happens if the device is slow compared to the CPU?

CPU spends a lot of time busy-waiting.

CMPSCI 377: Operating Systems Lecture 23, Page 9

Department of Computer Science, UMass Amherst Andrew H. Fagg

Communication using Interrupts

_ Rather than using busy waiting. the device can interrupt the CPU when it

completes an I/O operation.

_ On an I/O interrupt:

{ Determine which device caused the interrupt.

{ If the last command was an input operation, retrieve the data from the

device register.

{ Start the next operation for that device.

CMPSCI 377: Operating Systems Lecture 23, Page 10

Department of Computer Science, UMass Amherst Andrew H. Fagg

Direct Memory Access

_ For devices that transfer large volumes of data at a time (like a disk

block), it is expensive to have the CPU retrieve these one byte at a time.

_ Solution: Direct memory access (DMA)

{ Use a sophisticated DMA controller that can write directly to memory.

Instead of data-in/data-out registers, it has an address register.

{ The CPU tells the DMA the locations of the source and destination of

the transfer.

{ The DMA controller operates the bus and interrupts the CPU when

the entire transfer is complete, instead of when each byte is ready.

{ The DMA controller and the CPU compete for the memory bus,

slowing down the CPU somewhat, but still providing better

performance than if the CPU had to do the transfer itself.

CMPSCI 377: Operating Systems Lecture 23, Page 11

Department of Computer Science, UMass Amherst Andrew H. Fagg

Application Programmer's View of I/O Devices

_ The OS provides a high-level interface to devices, greatly simplifying the

programmer's job.

{ Standard interfaces are provided for related devices.

{ Device dependencies are encapsulated in device drivers.

{ New devices can be supported by providing a new device driver.

CMPSCI 377: Operating Systems Lecture 23, Page 12

Department of Computer Science, UMass Amherst Andrew H. Fagg

Application Programmer's View of I/O Devices (cont)

_ Device characteristics:

{ Transfer unit: character or block

{ Access method: sequential or random access

{ Timing: synchronous or asynchronous.

_ Most devices are asynchronous, while I/O system calls are

synchronous.

) The OS implements blocking I/O

{ Sharable or dedicated

{ Speed

{ Operations: Input, output, or both

{ Examples: keyboard (sequential, character), disk (block, random or

sequential)

CMPSCI 377: Operating Systems Lecture 23, Page 13

Department of Computer Science, UMass Amherst Andrew H. Fagg

I/O Bu_ering

I/O devices typically contain a small on-board memory where they can store

data temporarily before transferring to/from the CPU.

_ A disk bu_er stores a block when it is read from the disk.

_ It is transferred over the bus by the DMA controller into a bu_er in

physical memory.

_ The DMA controller interrupts the CPU when the transfer is done.

CMPSCI 377: Operating Systems Lecture 23, Page 14

Department of Computer Science, UMass Amherst Andrew H. Fagg

Why bu_er on the OS side?

_ To cope with speed mismatches between device and CPU.

{ Example: Compute the contents of a display in a bu_er (slow) and

then zap the bu_er to the screen (fast)

_ To cope with devices that have di_erent data transfer sizes.

{ Example: ftp brings the _le over the network one packet at a time.

Stores to disk happen one block at a time.

_ To minimize the time a user process is blocked on a write.

{ Writes )copy data to a kernel bu_er and return control to the user

program. The write from the kernel bu_er to the disk is done later.

CMPSCI 377: Operating Systems Lecture 23, Page 15

Department of Computer Science, UMass Amherst Andrew H. Fagg

Caching

_ Improve disk performance by reducing the number of disk accesses.

{ Idea: keep recently used disk blocks in main memory after the I/O call

that brought them into memory completes.

{ Example: Read (diskAddress)

If (block in memory) return value from memory

Else ReadSector(diskAddress)

{ Example: Write (diskAddress)

If (block in memory) update value in memory

Else Allocate space in memory, read block from disk, and update value

in memory

CMPSCI 377: Operating Systems Lecture 23, Page 16

Department of Computer Science, UMass Amherst Andrew H. Fagg

Caching (cont)

_ What should happen when we write to a cache?

{ write-through policy (write to all levels of memory containing the

block, including to disk). High reliability.

{ write-back policy (write only to the fastest memory containing the

block, write to slower memories and disk sometime later). Faster.

CMPSCI 377: Operating Systems Lecture 23, Page 17

Department of Computer Science, UMass Amherst Andrew H. Fagg

Putting the Pieces Together - a Typical Read Call

1. User process requests a read from a device.

2. OS checks if data is in a bu_er. If not,

(a) OS tells the device driver to perform input.

(b) Device driver tells the DMA controller what to do and blocks itself.

(c) DMA controller transfers the data to the kernel bu_er when it has all

been retrieved from the device.

(d) DMA controller interrupts the CPU when the transfer is complete.

3. OS transfers the data to the user process and places the process in the

ready queue.

4. When the process gets the CPU, it begins execution following the system

call.

CMPSCI 377: Operating Systems Lecture 23, Page 18

Department of Computer Science, UMass Amherst Andrew H. Fagg

Summary

_ I/O is expensive for several reasons:

{ Slow devices and slow communication links

{ Contention from multiple processes.

{ I/O is typically supported via system calls and interrupt handling,

which are slow.

_ Approaches to improving performance:

{ Reduce data copying by caching in memory

{ Reduce interrupt frequency by using large data transfers

{ O_oad computation from the main CPU by using DMA controllers.

{ Increase the number of devices to reduce contention for a single device

and thereby improve CPU utilization.

{ Increase physical memory to reduce amount of time paging and thereby

improve CPU utilization.

CMPSCI 377: Operating Systems Lecture 23, Page 19

Department of Computer Science, UMass Amherst Andrew H. Fagg

Next Time

_ Mass Storage and Disk Scheduling (Chapter 13)

CMPSCI 377: Operating Systems Lecture 23, Page 20