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Logic Probe

The following figure shows the schematic for this versatile logic probe.

Scince this circuit is intended for TTL & CMOS circuits, a 4049 can be used instead of the 7404, simplifying all the CMOS/TTL swithching. But the only inverter avaliable at the time of construction was the 7404.

The zener diode is used because the inverters are TTL, and since their trigger voltage is 2.2V, the voltage of the Zener diode will do fine. This zener diode can be erased if the probe is giong to be used only in TTL circuits.

The basic logic probe is acheived with inverters I & II. Two oscillators (at different frequencies) generate the tones for the piezo buzzer to indicate LOW and HIGH, so whenever there’s a high level in the input, the buzzer will make the HIGH tone and whenever there’s a low level in the input, the buzzer will make the LOW tone. That’s what the AND gates are for.

The Normal/Pulse DPDT switch is used to intermitently light a yellow LED and for the buzzer to make the input oscilation tone whenever there’s an oscillation in the input.

The CMOS/TTL SPDT switch is used to select the Vcc voltage from the circuit under test or the voltage from the 7805 regulator. Note that when this switch is in the TTL position, it can only work with 5VDC, but when the switch is in the CMOS position, it can work from 7.5VDC to 35VDC.

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For any comments, you can contact me at kuashio@hotmail.com