What do we offer
DESIGN ENGINEERS
VLSI links
List of EDA companies
EE Times
Vlsi training in India
Vlsi Links
India vlsi forum
EDA.org
Alliance Free EDA software
eg3
Verilog Info (parmita)
Hardi Training
Careers at eebrain
Senior Design Engineer:
Synthesis, Place & Route, Static Timing Analysis. 4-5 years experience
Technical Writers:
Need technical writer to develop technical help manuals. Experience in VLSI essential.
Internship:
Digital Electronics (BS/MS) experience with CAD tools desired