(There is some confusion caused by different uses of the term 'slew rate'. I use it just to mean rate of change of voltage, but some use it to mean the maximum rate of change, which I refer to as 'maximum slew rate'.)
Symmetry in audio power amplifier design is widely regarded as a 'good thing', but the benefits claimed for symmetry are in some cases entirely pointless. One example I have seen mentioned a few times is that a design has 'symmetric slew rate.' What is meant by this is that the maximum slew rate is the same for positive or negative-going outputs. What makes this unimportant is that no well designed modern amplifier is ever going to be driven anywhere near its maximum slew rate by a music signal from a good quality source. The output slew rate is therefore in practice always just the input signal slew rate multiplied by the voltage gain of the amplifier. Music signals generally have asymmetric slew rates, and so the amplifier output slew rate will also be asymmetric. This has nothing to do with the maximum slew rate, and whether this is the same value in positive and negative direction makes no difference.
As demonstrated in the earlier analysis of input stage distortion, even a simple complementary feedback pair (cfp) can have lower distortion than the more common long-tailed pair (ltp) input stage. Many designers go even further and use a complementary pair of ltp stages, one with a pair of npn transistors, the other with a pair of pnp. This has always puzzled me, there appears to be little real advantage, and several disadvantages.
One problem is that the overall feedback is unable to compensate for two different input offset voltages at the same time, and consequently there is in effect a permanent dc input to each ltp, and unless this is accurately nulled by a preset adjustment or component matching the dc gain of the input stages must be kept low to prevent later stages being operated at the wrong dc level. This may not be a serious problem to those who promote the idea that high feedback is bad, and that wide open-loop bandwidth is good so that dc loop gain is kept relatively low.
(There is some advantage to increased open-loop bandwidth if it is achieved by reducing the compensation capacitor, which also increases the gain-bandwidth product of the feedback loop. Unfortunately some designers achieve an increased open-loop bandwidth by adding a resistor in parallel with the compensation capacitor, which increases the signal handled by the input stage at all frequencies and makes almost all forms of input stage distortion worse. A wide open-loop response can be good or bad depending on how it is achieved, so this is a potentially misleading requirement. It is less misleading to say that increased gain-bandwidth product is desirable, but of course this implies an increased loop gain, i.e. high feedback. For a given closed-loop gain increasing the open-loop gain will reduce the signal handled by the input stage and reduce most forms of distortion. Common-mode distortion is one exception, but this can be eliminated by the inverting 'virtual earth' input arrangement I use in all my recent designs. In my high feedback MJR-6 the input stage only needs to handle a fraction of a millivolt, and with a highly linear cfp input stage the distortion contribution is negligible.)
One real advantage of a complementary bjt input stage is that the base input currents can cancel, but this requires accurate matching of current gains. I first encountered this idea in an application note for the National Semiconductors LH0002 (AN-13 Sept 1968), which even so has a specified input offset current up to 10uA. I recently found an earlier example in AN-3 Nov-1967 'Drift Cancellation Techniques For Integrated DC Amplifiers'. These were not differential input stages, so the offset problem did not arise.
Fets have a fairly accurate square-law response, and a single device will generate almost entirely second harmonic distortion. Using a ltp stage with fets the second harmonic can be cancelled, though accurate cancellation is less easy than for the equivalent bjt stage because of the wider variation in device characteristics. Unfortunately, even if the second harmonic is accurately nulled there will now be a significant level of third and higher harmonics. To see why this happens look at how the mutual conductance of a fet varies with input voltage. The first diagram is for a single fet, the second for a ltp using a pair of fets.For perfect linearity we want a horizontal line, and it can be seen that for voltages close to zero the ltp graph is almost flat, but as the signal voltage rises the linearity becomes increasingly poor. The single fet produces almost entirely second harmonic distortion for a sine-wave input, and the ltp generates third and higher order harmonics.
There are, however, circuit arrangements in which a pair of fets can be driven in opposite phase in a symmetric circuit, and almost perfect linearity can in theory be achieved over a wide range of input signal, and an example is shown in the second half of the next diagram:
The first of these diagrams is just the standard ltp circuit with current mirror output to match the drain currents in conjunction with overall feedback. The highly non-linear gm plot shown above makes this suitable only for small signal voltages. The second diagram however gives an output current which is just the difference between two individual fet currents, and so gm is just the sum of two individual straight line graphs as in the above graph for one fet, but sloping in opposite directions so that added together they give just a horizontal line over a wide range. The second harmonic cancels as for the ltp, depending on how well the devices are matched or adjusted, but even for poor matching no additional higher order distortion is generated. Of course this is not an entirely convenient arrangement, particularly with a transformer used for opposite phase inputs as shown here, and it is not clear how to apply overall feedback if required, but the advantage of this version is that both fets are the same polarity, which makes accurate matching relatively easy.
Alternative variations using a n-channel and a p-channel device can also in theory have zero distortion, but accurately matching complementary devices is more difficult. An example is shown next on the left, here as an output stage. The gm graph is constant up to the point where one or other device switches off.
The same circuit can be used with low-power fets as an input stage, which can then have its output taken from either the sources, with the load resistor being omitted, or the drain currents can be subtracted in one way or another, with the 'load resistor' shown now being used to set the gain, or being reduced to zero. Low-noise jfets are available, but the problem when using these in the left-hand diagram is that they have zero Vgs with no signal, and the junctions become forward biased with signals applied, severely limiting the input voltage range unless RL is high enough. It is tempting to add source resistors as shown on the right, but in either an input or output stage this will make the gm graphs curved rather than linear, and the two devices will no longer give a horizontal line, even if they are perfectly matched and also perfectly square-law. This is a good example of how a little local feedback can add distortion, including some high order harmonics. In practice for less than perfect square-law devices high order harmonics will be present in any case. My article about local feedback has this link to an article Small-Signal Distortion in Feedback Amplifiers for Audio by James Boyk and Gerald Jay Sussman, (a pdf file), which shows the results of numerical methods used to produce intermodulation distortion spectra for feedback amplifiers. They also conclude that the complementary fet output stage can have zero distortion for ideal square-law devices.
The output stage is similar to that used with power mosfets in my MJR-6 and MJR-7 designs, but there the output current can be sufficient to switch off one or the other device, giving crossover effects which need to be reduced by high overall feedback. The quiescent current of 100mA used means, if the mosfets are accurate square-law, that when one switches off the other will have drain current 400mA, so this is the peak output current up to which perfect linearity would be possible, except that accurately matched complementary mosfets are virtually impossible to obtain, and they are not perfectly square-law.
Next is another variation, using a pair of enhancement mode mosfets with drains connected together to give direct subtraction of their currents to provide the output. Again for ideal square-law accurately matched devices the distortion would be zero:
This is just an example, not a tested circuit, and is a line input buffer, with a log volume control to adjust the gain and a servo to reduce output offset by adjusting the supply voltages. The 100R is added to keep the servo working at zero volume setting which would otherwise short the sensed dc offset. Using this sort of volume control rather than taking the output from the control wiper will increase the allowed input voltage range. The mosfets need to have drain current about 10mA with gate voltage 7.5V. One possibility, although not ideal, is the CD4069B digital integrated circuit (cost about 40p). This contains six mosfet complementary pairs, each pair with gates and drains connected as required. Only one pair can be used because if we tried connecting several in parallel the 200mW maximum device dissipation could be exceeded.
These mosfets are almost certainly not very low noise, or accurately matched. They include a series input resistor and overload protection diodes to prevent damage from static electricity. This is a digital inverter, intended to be switched to one rail or the other, and all the unused inputs must be connected to one of the device supplies to disable them. I have left out capacitor values, and experimentation may be the easiest way to choose these. The op-amp needs to be able to supply well over 20mA output, and have a low input current.
If ultimate low-noise performance is not essential this could be a useful circuit for those with an aversion to negative feedback. This is in principle a genuine 'zero feedback' example, unlike circuits including source resistors, though in reality internal resistances and capacitances will add some low level feedback, as will the servo. At best, even with perfect component matching, this sort of circuit will cancel only the relatively benign even-order distortion. While further improvements are possible it is easy to achieve far better results in a simple feedback amplifier. A bipolar transistor cfp buffer stage with curent source load can keep all distortion down around 0.0001% at 1V RMS output, and that is mostly second harmonic. Optimum low-noise and supply rejection may be far more important than the lowest possible distortion, and here also the cfp can be excellent, with input device current easily optimised for lowest noise.